Nanoscale Memory Repair

Masashi Horiguchi; Kiyoo Itoh

Buku ini diterbitkan oleh Springer tahun 2011. Cakupan 226 halaman.

Daftar isi:

1. An Introduction to Repair Techniques, 1

• Introduction, 1
• Hard and Soft Errors and Repair Techniques, 1
• Margin Errors and Repair Techniques, 9
• Speed-Relevant Errors and Repair Techniques, 15

2. Redundancy, 19

• Introduction, 19
• Models of Fault Distribution, 20
• Yield Improvement Through Redundancy, 25
• Replacement Schemes, 29
• Intrasubarray Replacement, 36
• Intersubarray Replacement, 52
• Subarray Replacement, 54
• Devices for Storing Addresses, 56
• Testing for Redundancy, 61

3. Error Checking and Correction (ECC), 69

• Introduction, 69
• Linear Algebra and Linear Codes, 70
• Galois Field, 75
• Error-Correcting Codes, 77
• Coding and Decoding Circuits, 92
• Theoretical Reduction in Soft-Error and Hard-Error Rates, 105
•  Application of ECC, 111
• Testing for ECC, 135

4. Combination of Redundancy and Error Correction, 139

• Introduction, 139
• Repair of Bit Faults Using Synergistic Effect, 139
• Application of Synergistic Effect, 149

5. Reduction Techniques for Margin Errors of Nano-scale Memories, 157

• Introduction, 157
• Definition of Vmin, 159
• Reduction of Vmin for Wider Margins, 160
• Advanced MOSFETs for Wider Margins, 165
• Logic Circuits for Wider Margins, 173
• SRAMs for Wider Margins, 182
• DRAMs for Wider Margins, 188
• Subsystems for Wider Margins, 194

6. Reduction Techniques for Speed-Relevant Errors of Nanoscale Memories, 203

• Introduction, 203
•  Reduction Techniques for Speed-Degradation Errors, 204
•  Reduction Techniques for Interdie Speed-Variation Errors, 205

Index , 213

 

Baca & Informasi lebih lanjut, hubungi:
PDII-LIPI SERPONG
Telp. 021-7560537
E-mail: pdiiserpong@yahoo.com